Semiconductor conductivity testing determines the resistivity, sheet resistance, carrier concentration, and Hall mobility that govern the electrical performance of wafers, epitaxial layers, and thin films. Accredited third-party laboratories apply internationally recognized methods such as four-point probe, non-contact eddy current, Hall effect, and spreading resistance profiling to support R&D, process control, and incoming material inspection. This article explains the technical principles, sample types, measurable parameters, applicable standards, and typical applications of semiconductor conductivity testing.
Technical Overview
Electrical conductivity quantifies how readily a material conducts current and is mathematically defined as the reciprocal of electrical resistivity. In semiconductors, conductivity is not a fixed material constant but a parameter engineered through doping, and it is governed by the carrier concentration, carrier mobility, and temperature. For a doped silicon or compound semiconductor, conductivity equals the product of the elementary charge, carrier concentration, and drift mobility, so conductivity testing is fundamentally a characterization of doping level and crystal quality.
In practice, engineers specify semiconductor materials using several related quantities: bulk resistivity expressed in ohm-centimeters, sheet resistance expressed in ohms per square, carrier concentration in carriers per cubic centimeter, and Hall mobility in square centimeters per volt-second. Because semiconductor resistivity spans many orders of magnitude, from heavily doped substrates below 0.001 ohm-centimeter to high-resistivity float-zone silicon above 10,000 ohm-centimeters, no single measurement technique covers the full range. Professional testing therefore combines contact methods such as the four-point probe with non-contact and magnetic-field-based techniques to deliver accurate, traceable results.
Reliable conductivity testing requires careful control of probe geometry, wafer dimensions, edge effects, wafer temperature, surface preparation, and photoconductive artifacts. Measurements are performed in accordance with standards published by ASTM International (many of which are now maintained as SEMI MF standards), SEMI, IEC, GB/T, and JIS, and results are traceable to certified reference materials. Accredited third-party laboratories provide these services with calibrated instrumentation, documented procedures, and complete test reports suitable for quality disputes, supplier qualification, and product certification.
Testing Samples
Single-Crystal Wafers and Ingots
Monocrystalline silicon wafers from 100 mm to 300 mm in diameter, including polished, lapped, and as-cut slices, are routinely tested for bulk resistivity. Resistivity can be mapped at the center, half-radius, and edge positions to quantify radial resistivity variation, and full-wafer contour maps can be generated for statistical process control. Axial resistivity scans of crystal ingots evaluate doping uniformity from seed end to tail end before slicing.
Epitaxial, Diffused, and Deposited Layers
Conducting layers formed by epitaxial growth, diffusion, or deposition, including doped silicon epitaxial layers, silicon-germanium, polysilicon, and silicon-on-insulator films, are characterized by sheet resistance. Because these layers are thin, typically from sub-micrometer to tens of micrometers, sheet resistance measurement is more meaningful than bulk resistivity and directly reflects layer thickness and doping integration.
Ion-Implanted and Annealed Junctions
Shallow junctions created by ion implantation and subsequent annealing are tested for sheet resistance uniformity across the wafer. High-density mapping with hundreds to thousands of measurement points identifies dose non-uniformity, implanter issues, and anneal-window deviations. Such measurements are essential in advanced CMOS and power device process monitoring.
Compound Semiconductor and Wide-Bandgap Materials
Gallium arsenide, indium phosphide, silicon carbide, gallium nitride, aluminum nitride, gallium oxide, and related compound semiconductor wafers and templates are tested for resistivity, carrier concentration, and mobility. Semi-insulating substrates for RF applications require specialized high-resistivity measurement, and AlGaN/GaN heterostructures are evaluated for two-dimensional electron gas sheet resistance.
Thin Films and Functional Device Structures
Metallic interconnect films, transparent conducting oxides such as ITO and AZO, ohmic contact stacks, and finished device test structures are measured for sheet resistance and contact characteristics. Test coupons, patterned van der Pauw structures on product wafers, and wafer fragments are all acceptable sample formats depending on the technique selected.
Testing Items
Typical electrical parameters delivered in a semiconductor conductivity test report include the following:
- Bulk resistivity and its reciprocal, volume conductivity, in ohm-centimeters and siemens per centimeter
- Sheet resistance in ohms per square for thin conducting layers
- Carrier type, n-type or p-type, determined by Hall measurement or hot-probe method
- Carrier concentration in carriers per cubic centimeter, derived from Hall data or standard resistivity-doping curves
- Hall coefficient and Hall mobility in square centimeters per volt-second
- Radial resistivity variation and within-wafer uniformity statistics such as range, standard deviation, and percent non-uniformity
- Axial resistivity gradient along crystal ingots
- Resistivity depth profiles and electrical junction depth by spreading resistance profiling
- Temperature-dependent resistivity and mobility from cryogenic to elevated temperatures
Testing Methods
Collinear Four-Point Probe Method
The four-point probe is the most widely used technique for semiconductor resistivity. A defined current passes through the two outer probes while the voltage is sensed between the inner probes, which eliminates the error caused by contact resistance. Measured values are corrected for sample thickness, probe spacing, and edge proximity using geometric correction factors. The method is described in ASTM F84, SEMI MF84, ASTM F374, SEMI MF374, GB/T 1552, and JIS H 0611, and it typically covers resistivity from below 0.001 to several thousand ohm-centimeters. It is suitable for wafers, bars, and bulk samples with accessible flat surfaces.
Non-Contact Eddy Current Method
In the non-contact eddy current technique, an RF coil induces circulating currents in the wafer and a sensing circuit measures the associated power loss or impedance change, from which resistivity or sheet resistance is calculated. Because nothing touches the wafer, the method is non-destructive and enables rapid full-surface mapping, making it ideal for epitaxial layer qualification and high-volume incoming inspection. The relevant procedures are given in ASTM F673, SEMI MF673, and GB/T 6616. The technique covers a broad resistance range and accommodates both conducting substrates and thin conducting layers on insulating or opposite-type substrates.
Hall Effect and Van der Pauw Measurement
Hall effect measurement is the only common method that yields carrier type, carrier concentration, and mobility simultaneously. A current-carrying sample is placed in a magnetic field, and the transverse Hall voltage is measured together with the longitudinal resistance. Using symmetric van der Pauw sample geometries and polarity-reversal averaging, systematic thermoelectric and resistive offsets are eliminated. The governing standards are ASTM F76, SEMI MF76, and GB/T 4326. Variable-temperature Hall measurements from liquid nitrogen temperature to several hundred degrees Celsius further reveal ionized impurity scattering and compensation effects.
Spreading Resistance Profiling
Spreading resistance profiling maps resistivity as a function of depth. The sample is beveled at a shallow angle and two closely spaced probes are stepped along the beveled surface, with each reading converted to local resistivity through calibrated correction factors. The resulting depth profile reveals doping gradients, transition widths, and electrical junction depth in epitaxial and diffused structures. The method follows ASTM F525 and SEMI MF525 and achieves depth resolution in the tens of nanometers range, making it a standard tool for epitaxial layer verification and process simulation calibration.
Supporting Optical and Electrical Techniques
For special requirements, laboratories complement the core methods with infrared free-carrier absorption and photoluminescence spectroscopy for non-destructive carrier concentration determination, capacitance-voltage profiling for depletion-region doping profiles, and surface photovoltage techniques for near-surface characterization. Non-contact microwave and optical reflectance methods extend measurement capability to delicate or fully processed wafers that must not be contacted or damaged.
All measurements are performed under controlled ambient and temperature conditions, typically 23 degrees Celsius, using probes and instruments calibrated against certified reference wafers. Test reports state the applicable standard, measurement configuration, correction factors applied, measurement uncertainty, and complete data tables or wafer maps as required by the client.
Applications
Semiconductor conductivity testing supports every stage of the electronics value chain, from crystal growth to finished device qualification:
- Crystal growth optimization and dopant charge control for Czochralski, float-zone, and compound semiconductor ingots
- Incoming wafer inspection and supplier quality verification for device manufacturers
- Epitaxial process qualification, including layer resistivity, thickness-derived doping, and transition-region evaluation
- Ion implantation dose and anneal process monitoring through sheet resistance uniformity mapping
- Development and production of silicon carbide and gallium nitride power and RF devices, where substrate and epilayer resistivity directly affect device breakdown and loss
- Photovoltaic materials characterization for silicon bricks, wafers, and thin-film absorbers
- Transparent conductive oxide development for displays, touch panels, and solar cells
- University and institute research on novel semiconductors, including ultra-wide-bandgap materials and two-dimensional materials
- Failure analysis, lot acceptance testing, and technical due diligence in commercial disputes
FAQ
What is the difference between resistivity and sheet resistance?
Resistivity is an intrinsic bulk property expressed in ohm-centimeters and applies to uniformly doped thick samples. Sheet resistance, expressed in ohms per square, describes a thin layer and equals the layer resistivity divided by its thickness. Sheet resistance is independent of the path length across the layer, which makes it the natural parameter for epitaxial, implanted, and deposited films.
Is four-point probe testing destructive?
The four-point probe requires mechanical contact with the sample surface and may leave light probe marks on polished wafers, so it is considered semi-destructive for prime product wafers but fully acceptable for monitor wafers and test coupons. Non-contact eddy current and optical methods are available when the sample must remain completely unmarked.
What resistivity range can be measured?
Four-point probe measurement typically covers approximately 0.001 to 10,000 ohm-centimeters, non-contact eddy current methods cover a similar broad span for wafers, and specialized guarded or high-impedance configurations extend measurement into the megaohm-centimeter range required for semi-insulating substrates.
How is the carrier type, n or p, determined?
Carrier type is determined from the sign of the Hall voltage in a Hall effect measurement, or alternatively by the hot-probe thermoelectric method. Hall measurement is preferred because it simultaneously provides carrier concentration and mobility with full standards traceability.
What sample sizes and preparation are required?
Standard four-point probe and eddy current testing accepts whole wafers from 100 to 300 mm as well as fragments larger than a few millimeters, provided the surface is reasonably flat and clean. Hall measurements use square or cloverleaf samples, typically 5 to 10 mm across, with four ohmic contacts applied at the edges or corners.
Which standards govern semiconductor conductivity testing?
The principal standards include ASTM F84 and SEMI MF84 for four-point probe resistivity, ASTM F374 and SEMI MF374 for sheet resistance of layers, ASTM F673 and SEMI MF673 for non-contact eddy current measurement, ASTM F76 and SEMI MF76 for Hall effect measurements, ASTM F525 and SEMI MF525 for spreading resistance profiling, together with the corresponding Chinese national standards GB/T 1552, GB/T 6616, and GB/T 4326 and the Japanese standard JIS H 0611.